GigPeak has been designing ASICs in CMOS technology since 1989 with more than 2000 ASIC designs to date. CMOS process is well suited for low power, low cost applications that require integration of various IP blocks to form a system on chip (SOC) product. GigPeak works closely with its foundry partners to develop an extensive array of structured ASIC, standard cell and IP blocks for our customers. For each ASIC design, we work with our customers to choose the best process technology, packaging & IPs to provide the ASIC with best price/performance solution.
GigPeak offers an array of logic and mixed signal processes from 0.6um to most advanced 40nm & 28nm technologies. Customers therefore have a choice from different process nodes, voltages, and mixed signal technologies to design a true SOC chip.
With the availability of geometries to 28nm & lower, the performance of CMOS based devices are approaching SiGe speeds. For instance 28G SerDes, TIA, Driver etc. are achievable in 40nm or 28nm process geometries making it possible to integrate these very high speeds IPs using digital circuits.